In advanced technology nodes of integrated circuit industry, high k dielectric material and metal are adopted to form a gate stack of a field-effect transistor (FET) such as a metal-oxide-semiconductor field-effect transistors (MOSFETs). In a method to form a metal gate stack, various dry and wet etching processes are implemented. For example, when a capping layer interposed between the high k dielectric material layer and the metal gate layer, the existing etching process generates heavy polymeric residue, which is difficult to remove. In addition, the capping layer itself is difficult to remove.